SX1280 (2.4 GHz LoRa / FLRC transceiver)
Semtech SX1280, the radio of ExpressLRS 2.4 GHz: SPI commands as in the data sheet (packet type, modulation, frequency, power, buffer, TX / RX with timeout, IRQs on DIO1–3, BUSY, packet status with RSSI and SNR). Packets travel through the World: their power falls with distance, antenna direction and polarisation, the receiver sees thermal noise and other transmitters, and loses packets below its sensitivity (LoRa SF12 / 203 kHz: −132 dBm).
Key data
- Category
- Radio
- Simulation model
- Behavioural mixed-signal model
- Manufacturer part number
- SX1280IMLTRT
- Reference prefix
- U
- Pins
- 19
- Land pattern
- VQFN-24-1EP_4x4mm_P0.5mm_EP2.5x2.5mm_ThermalVias
Simulation model
A behavioural model implements the interface of the chip (registers, protocol, timing) at its pins. The pins are connected to the analog circuit like CMOS pins.
- Model
- sx1280
- Supply pins
- VBAT / GND
Pins 19
| Pin | Name | Use |
|---|---|---|
| NSS | NSSInput pin | Logic input: never leave open (tie unused inputs to VCC or GND) |
| SCK | SCKInput pin | Logic input: never leave open (tie unused inputs to VCC or GND) |
| MOSI | MOSIInput pin | Logic input: never leave open (tie unused inputs to VCC or GND) |
| MISO | MISOOutput pin | Logic output: drives the next input; do not tie outputs together |
| BUSY | BUSYOutput pin | Logic output: drives the next input; do not tie outputs together |
| DIO1 | DIO1Output pin | Logic output: drives the next input; do not tie outputs together |
| DIO2 | DIO2Output pin | Logic output: drives the next input; do not tie outputs together |
| DIO3 | DIO3Output pin | Logic output: drives the next input; do not tie outputs together |
| NRESET | NRESETInput pin | Logic input: never leave open (tie unused inputs to VCC or GND) |
| VBAT | VBATSupply pin | Supply input: decouple with 100 nF close to the pin |
| VBAT_IO | VBAT_IOSupply pin | Supply input: decouple with 100 nF close to the pin |
| VDD_IN | VDD_INAnalog pin | General-purpose I/O: LEDs (with series resistor), buttons (with pull-up) |
| DCC_FB | DCC_FBAnalog pin | General-purpose I/O: LEDs (with series resistor), buttons (with pull-up) |
| DCC_SW | DCC_SWAnalog pin | General-purpose I/O: LEDs (with series resistor), buttons (with pull-up) |
| VR_PA | VR_PAAnalog pin | General-purpose I/O: LEDs (with series resistor), buttons (with pull-up) |
| XTA | XTAAnalog pin | General-purpose I/O: LEDs (with series resistor), buttons (with pull-up) |
| XTB | XTBAnalog pin | General-purpose I/O: LEDs (with series resistor), buttons (with pull-up) |
| RFIO | RFIOAnalog pin | General-purpose I/O: LEDs (with series resistor), buttons (with pull-up) |
| GND | GNDGround pin | Ground |
Parameters 4
antennaDipole 2 dBi with nulls along its axis; chip ≈ 0.5 dBi; PCB antenna of a module ≈ 0 dBi; patch ≈ 6 dBi towards its face, RHCP = circular.
antAxisAlong which board axis the antenna element lies (a patch: which way its face looks). Front = towards the board's top edge in the PCB view.
antLosspaPower amplifier after the chip, as on 100 mW / 250 mW / 1 W ExpressLRS modules (≈ +8 / +11 / +17 dB). 0 = the chip alone (max. 12.5 dBm).
PCB
VQFN-24-1EP_4x4mm_P0.5mm_EP2.5x2.5mm_ThermalVias| Package | Land pattern | Status | Source |
|---|---|---|---|
| QFN-24 4x4 · SX1280IMLTRT | VQFN-24-1EP_4x4mm_P0.5mm_EP2.5x2.5mm_ThermalVias | Verified land pattern | Semtech DS_SX1280-1 Rev 3.2: table 2-1 (pinout, exposed pad = GND), §17 QFN 4 × 4 mm 0.5 mm pitch; KiCad footprint VQFN-24-1EP_4x4mm_P0.5mm_EP2.5x2.5mm_ThermalVias |
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